I had the same issue with an AM335x processor based SoC when using the Genode kernel. The issue related to TLB entry attributes: The Am335X processors expects cacheability to be:
Inner --Write-thru, No Write Allocate
Outer -- Write-back, Write Allocate.

So, based on the info in the ARM Architecture Ref Manual for the Arm_v7
(pp 1368), I set the attributes in memory_region_attr (Genode 13.08) to :

Device memory:
         Tex::bits(0) | C::bits(0) | B::bits(1);

Cacheable memory
         Tex::bits(5) | C::bits(1) | B::bits(0);

Non-cacheable memory
         Tex::bits(6) | C::bits(1) | B::bits(0);

The above syntax is from Genode code but you can see the bit settings needed to create valid TLB entries for this processor.

Hope this helps.

  Bob Stewart

Sent from my android device.

-----Original Message-----
From: Jordan Woehr <jordanwoehr@gmail.com>
To: devel@sel4.systems
Sent: Wed, 14 Jan 2015 12:33 PM
Subject: [seL4] Elfloader faults when MMU activated