Hi Jesse
Thanks for your answer. I checked the specs [1] [2]:
* ZCU104
UART0 (MIO 18-19)
Primary Zynq UltraScale+ MPSoC PS-side UART interface, connected to the U151 FT4232HL USB-to-Quad-UART.
PS-side UART0 is accessed through the U151 FT4232HL USB-to-Quad-UART bridge BDBUS port.
The UART connections from XCZU7EV MPSoC U1 PS-side MIO 18 and 19 to the FT4232HL device through level-shifter U161.
UART1 (MIO 20-21)
PS-side UART1 is accessed through the U151 FT4232HL USB-to-Quad-UART bridge CDBUS port.
* ZCU102
UART0 (MIO 18-19)
Primary Zynq UltraScale+ MPSoC PS-side UART interface, connected to the U40 CP2108 USB-to-Quad-UART bridge.
PS-side UART0 is accessed through the U40 CP2108 USB-to-Quad-UART bridge port 0.
UART1 (MIO 20-21)
PS-side UART1 is accessed through the U40 CP2108 USB-to-Quad-UART Bridge port 1.
According to this the UARTs are quite different. So the ZCU104 does not run out of the box and may require (quite) some work. Do you concur?
Kind regards,
derek
‐‐‐‐‐‐‐ Original Message ‐‐‐‐‐‐‐
On Tuesday, July 9, 2019 3:58 PM, Jesse Millwood <jesse.millwood@dornerworks.com> wrote:
Derek,
We haven't tried it on any other ZUS+ boards. It should be
pretty close but you may want to make sure that the UART isn't
different between the boards.
Jesse
On 2019-07-09 6:24 a.m., derek65
wrote:
I'm interested in running sel4 on a Xilinx Zynq
UltraScale+ MPSoC evaluation board. I read the great blog post
about the port from DornerWorks [1] and checked the sel4
hardware support page here [2].
Since the Zynq ZCU102 Evaluation Kit listed is quite
expensive, I wanted to ask if anyone tried the procedure
described in the blog post on the much cheaper Xilinx US+
ZCU104 Evaluation Kit. Might this work as well?