U-Boot 2018.03-rc3-00090-g3990c9d (Mar 01 2018 - 14:33:40 -0500)
TEGRA124
Model: Colorado Engineering TK1-SOM
Board: CEI tk1-som
DRAM: 2 GiB
MMC: sdhci@700b0400: 1, sdhci@700b0600: 0
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
Tegra124 (TK1-SOM) # setenv bootm_boot_mode nonsec
Tegra124 (TK1-SOM) # saveenv
Saving Environment to MMC... Writing to MMC(0)... OK
Tegra124 (TK1-SOM) # ext2ls mmc 0
<DIR> 4096 .
<DIR> 4096 ..
<DIR> 16384 lost+found
<DIR> 4096 boot
<DIR> 4096 bin
<DIR> 4096 dev
<DIR> 12288 etc
<DIR> 4096 home
<DIR> 4096 lib
<DIR> 4096 media
<DIR> 4096 mnt
<DIR> 4096 opt
<DIR> 4096 proc
62 README.txt
<DIR> 4096 root
<DIR> 4096 run
<DIR> 12288 sbin
<DIR> 4096 srv
<DIR> 4096 sys
<DIR> 4096 tmp
<DIR> 4096 usr
<DIR> 4096 var
150994944 testfile
20524388 capdl-loader-experimental-image-arm-tk1
Tegra124 (TK1-SOM) # ext2load mmc 0 ${loadaddr} capdl-loader-experimental-image-arm-tk1
20524388 bytes read in 593 ms (33 MiB/s)
Tegra124 (TK1-SOM) # bootelf ${loadaddr}
CACHE: Misaligned operation at range [90000000, 90000014]
CACHE: Misaligned operation at range [90001000, 900091c4]
CACHE: Misaligned operation at range [900091c4, 900098d8]
CACHE: Misaligned operation at range [900198d8, 900198e0]
CACHE: Misaligned operation at range [900198e0, 91392ae0]
CACHE: Misaligned operation at range [91394000, 913a4820]
CACHE: Misaligned operation at range [913a4820, 913a8000]
## Starting application at 0x90000000 ...
ELF loader: monitor mode init done
Copy monitor mode vector from 90001000 to a7f00000 size 50
Number of IRQs: 192
Load seL4 in nonsecure HYP mode 600001da
ELF-loader started on CPU: ARM Ltd. Cortex-A15 r3p3
paddr=[90000000..913a7fff]
ELF-loading image 'kernel'
paddr=[60000000..6003cfff]
vaddr=[e0000000..e003cfff]
virt_entry=e0000000
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