Hi all,
As a warm up, I've written a blog entry [1] of the project giving some introductory details for both RISC-V and seL4 microkernel and what has been done so far. Open to questions/suggestions.
[1] http://heshamelmatary.blogspot.co.uk/2015/05/porting-sel4-to-risc-v-status-r...
Thanks,