Re: [seL4] seL4 VMM Hangs during loading time

Hi Kent and Peter, Thank you so much for your response. I do not know what exactly caused the issue. But I upgraded my toolchain and recompiled the image again and it loaded this time. The GCC version is version 7.2.1 (before it was 4.6). Although I still see the misaligned information like this: CACHE: Misaligned operation at range [90000000, 90000014] CACHE: Misaligned operation at range [90001000, 900091c4] CACHE: Misaligned operation at range [900091c4, 900098d8] CACHE: Misaligned operation at range [900198d8, 900198e0] CACHE: Misaligned operation at range [900198e0, 91392ae0] CACHE: Misaligned operation at range [91394000, 913a4820] CACHE: Misaligned operation at range [913a4820, 913a8000] Another thing I found is that U-boot for TK1-SOM cannot detect ethernet, but I was able to copy the image into MMC and load from there. There are two things I want to do with the seL4 ARM VMM platform. First, I want to incorporate the secure boot from U-boot to seL4 and then using seL4 to verified signed Linux. Second, I want to build a PoC native application and allow the communication between the native app to communication with App running in Linux. I’m wondering if anyone did those two things before that can give me some advice? I implemented the the second scenario before using L4re with a paravirtualized L4Linux. But I’m exactly sure how to do it with seL4 yet. Best Regards -Daniel Wang

On Mar 1, 2018, at 8:00 PM, wrote:

Hi Daniel,

Two things to try:

First is to confirm that CONFIG_PRINTING is enabled to distinguish if the kernel is successfully starting its init process.

Second is ​to check what ${loadaddr} is set to. Yours seems correct, ours seems to be 0x81000000, but that is for the tk1 jetson dev board.

You could also try editing the elfloader to print out the contents of the kernel entrypoint before it jumps there to confirm that it is the correct instructions in the stage/arm/tk1/kernel.elf binary.

Below is what I see when I boot the project on our devboard.

Kind regards, Kent.

---- U-Boot SPL 2015.10-rc5-00002-gf861f51-dirty (Oct 13 2015 - 13:44:41)

U-Boot 2015.10-rc5-00002-gf861f51-dirty (Oct 13 2015 - 13:44:41 +1100)

TEGRA124 Model: NVIDIA Jetson TK1 Board: NVIDIA Jetson TK1 DRAM: 2 GiB MMC: Tegra SD/MMC: 0, Tegra SD/MMC: 1 tegra-pcie: PCI regions: tegra-pcie: I/O: 0x12000000-0x12010000 tegra-pcie: non-prefetchable memory: 0x13000000-0x20000000 tegra-pcie: prefetchable memory: 0x20000000-0x40000000 tegra-pcie: 2x1, 1x1 configur��K����Ʌ�pcie: probing port 0, using 2 lanes tegra-pcie: link 0 down, retrying tegra-pcie: link 0 down, retrying tegra-pcie: link 0 down, retrying tegra-pcie: link 0 down, ignoring tegra-pcie: probing port 1, using 1 lanes In: serial Out: serial Err: serial Net: RTL8169#0 Hit any key to stop autoboot: 2 0 Tegra124 (Jetson TK1) # setenv autoload no && dhcp && tftpboot 0x81000000 jetson1/sel4-image setenv autoload no && dhcp && tftpboot 0x81000000 jetson1/sel4-image BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.13.1.172 (2929 ms) Using RTL8169#0 device TFTP from server 10.13.0.130; our IP address is 10.13.1.172 Filename 'jetson1/sel4-image'. Load address: 0x81000000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################ 3.8 MiB/s done Bytes transferred = 20493516 (138b4cc hex) Tegra124 (Jetson TK1) # bootelf 0x81000000 bootelf 0x81000000 ## Starting application at 0x90000000 ... ELF loader: monitor mode init done Copy monitor mode vector from 90001000 to a7f00000 size 50 Number of IRQs: 192 Load seL4 in nonsecure HYP mode 600001da ELF-loader started on CPU: ARM Ltd. Cortex-A15 r3p3 paddr=[90000000..9139ffff] ELF-loading image 'kernel' paddr=[80000000..8003cfff] vaddr=[e0000000..e003cfff] virt_entry=e0000000 ELF-loading image 'capdl-loader-experimental' paddr=[8003d000..8158dfff] vaddr=[10000..1560fff] virt_entry=18484 Enabling hypervisor MMU and paging Jumping to kernel-image entry point...

Bootstrapping kernel Total 28 IOASID set up Region [c to 28) for SMMU caps Booting all finished, dropped to user space

From: Devel on behalf of Daniel Wang Sent: Friday, March 2, 2018 7:47 AM To: devel@sel4.systems Subject: [seL4] seL4 VMM Hangs during loading time

Hi all,

I’m trying to run seL as a microvisor following the CAMKES-ARM-VM. My development board is TK1-SOM from ColoradoEngineering. I was able to flash the U-boot to to load seL4 HYP mode. However when I try to load the kernel. The system just hangs. I got stuck here any help would be appreciated thank you!

I built the capdl-loader-experimental-image-arm-tk1 and can copied it to the TK1 MMC storage, then I followed the wiki to setup env bootm_boot_mode to nonsec. Attachment is the printout:

------------------------------------------------------------------------------------------- U-Boot 2018.03-rc3-00090-g3990c9d (Mar 01 2018 - 14:33:40 -0500)

TEGRA124 Model: Colorado Engineering TK1-SOM Board: CEI tk1-som DRAM: 2 GiB MMC: sdhci@700b0400: 1, sdhci@700b0600: 0 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Tegra124 (TK1-SOM) # setenv bootm_boot_mode nonsec Tegra124 (TK1-SOM) # saveenv Saving Environment to MMC... Writing to MMC(0)... OK Tegra124 (TK1-SOM) # ext2ls mmc 0 <DIR> 4096 . <DIR> 4096 .. <DIR> 16384 lost+found <DIR> 4096 boot <DIR> 4096 bin <DIR> 4096 dev <DIR> 12288 etc <DIR> 4096 home <DIR> 4096 lib <DIR> 4096 media <DIR> 4096 mnt <DIR> 4096 opt <DIR> 4096 proc

62 README.txt <DIR> 4096 root <DIR> 4096 run <DIR> 12288 sbin <DIR> 4096 srv <DIR> 4096 sys <DIR> 4096 tmp <DIR> 4096 usr <DIR> 4096 var

150994944 testfile

20524388 capdl-loader-experimental-image-arm-tk1 Tegra124 (TK1-SOM) # ext2load mmc 0 ${loadaddr} capdl-loader-experimental-image-arm-tk1 20524388 bytes read in 593 ms (33 MiB/s) Tegra124 (TK1-SOM) # bootelf ${loadaddr} CACHE: Misaligned operation at range [90000000, 90000014] CACHE: Misaligned operation at range [90001000, 900091c4] CACHE: Misaligned operation at range [900091c4, 900098d8] CACHE: Misaligned operation at range [900198d8, 900198e0] CACHE: Misaligned operation at range [900198e0, 91392ae0] CACHE: Misaligned operation at range [91394000, 913a4820] CACHE: Misaligned operation at range [913a4820, 913a8000] ## Starting application at 0x90000000 ... ELF loader: monitor mode init done Copy monitor mode vector from 90001000 to a7f00000 size 50 Number of IRQs: 192 Load seL4 in nonsecure HYP mode 600001da ELF-loader started on CPU: ARM Ltd. Cortex-A15 r3p3 paddr=[90000000..913a7fff] ELF-loading image 'kernel' paddr=[60000000..6003cfff] vaddr=[e0000000..e003cfff] virt_entry=e0000000

-------------------------------------------------------------------------------------------

Best Regards -Daniel Wang