More likely this is an SMP boot problem that should be fixed for everyone, otherwise other people will run into the same issue in the future for other ports.
Have you tried Microkit or seL4-Rust? They have their own loaders, would be interesting to know whether they run into the same issue.
Greetings,
Hi Indan, Sorry for the delayed response. I took additional time to investigate the issue before proposing a more robust solution than the workarounds. We see interconnect DDR transactions to the Secure DDR protected by a RIF (Resource Isolation Framework) when using "ret" instruction after enabling MMU. Causing to synchronous fault in TF-A. This transaction seems to be issued by the speculation engine or the branch target buffer, but is is not related to caches. On STM32MP2, the first 256 MB of DDR is reserved by the RIF for secure IPs (OPTEE). But with the elfloader, The 1Gb stage-1 mapping was shared between Sec and NSec regions, which does not look good. The fix is to restrict the translation tables before jumping into the kernel, breaking the 1GB stage-1 tables into smaller 2MB granules. This is probably a restriction limited to platforms with RIF protected DDR, (but should be OK for other aarch64 platforms). I submitted a RFC for a conditional support here: https://github.com/seL4/seL4_tools/pull/244 Thank you, Christian
Indan