Hi Baltazar, To get that version of seL4 working, you should use an obsolete version of the RISC-V toolchain. Follow the instructions here, https://docs.sel4.systems/Hardware/RISCV.html If you prefer to use the upstream riscv-gnu-toolchain, you need to checkout the latest sel4test-manifest. In either case, modifying the seL4 source code shouldn't be required. Regards, Siwei On Mon, 2019-07-29 at 21:36 +0000, Ortiz, Baltazar wrote:
Hi all,
I'm looking into getting seL4 booting on 32 bit RISC-V. Currently working with seL4test 10.1.1, QEMU 4.0.0, and an upstream copy of riscv-gnu- toolchain (is there a specific release I should try?).
I'm able to get seL4 to build after deleting a few CONST labels that the compiler was complaining about, but when I try to run the simulation script, I get the following output:
./simulate -b /home/baltazar/qemu/build/riscv32-softmmu/qemu-system- riscv32 /home/baltazar/qemu/build/riscv32-softmmu/qemu-system-riscv32 -machine spike_v1.10 -nographic -s -serial mon:stdio -m size=2000M -kernel images/sel4test-driver-image-riscv-spike bbl loader /host/sel4test-upstream-riscv/tools/riscv-pk/machine/minit.c:74: assertion failed: !(read_csr(misa) & fd_mask) Power off
Are there any tricks for getting this working right now?
Thanks,
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