RISC-V (32-bit), no L2 cache. All of user-space shares 1 ASID.
On Fri, Mar 10, 2023 at 4:23 PM Indan Zupancic
Hello,
On 2023-03-11 10:56, Sam Leffler via Devel wrote:
I've got a stress test that forces lots of memory recycling by creating, running & tearing down applications. I repeatedly see a particular point in the test (after memory starts being recycled) where an app gets an instruction fault. Narrowing the issue has been challenging so I'm questioning everything (including cache handling). This is all anonymous memory.
What platform are you running this on? Does it have a VIPT L1 cache, and if so, is KernelArmICacheVIPT enabled for your cpu?
Another thing that could trigger this is re-using ASIDs. It can be either a bug in your application code, or an ASID re-use bug in seL4.
Greetings,
Indan