Hi Ashokk:
If you look into the at those IRQ numbers (68, 69, 78 and 122), you'll find that they are offset by 32 from the numbers in the actual manual. Specifically, they are offset by 32 from the IRQ numbers listed in the TK1 manual.
The reason is that the IRQ numbers in the manual are offsets from the SPI (Shared Peripheral Interrupt) GIC vector base. I.e, from 32 -- the first 32 vectors in the GIC are for PPIs and SGIs, and the SPIs begin at 32 onwards.
These numbers are correct for the TK1, but I cannot comment on whether or not they are correct for the TX1 or TX2 because again, I'm sorry but I have no experience with the TX1/TX2, and you'll have to double-check these values in the TX1/TX2 manuals to see if they are correct :)
--
Kofi Doku Atuah
Kernel engineer
DATA61 | CSIRO
________________________________
From: Devel on behalf of ashokk@spanidea.com
Sent: 10 October 2017 22:04
To: devel@sel4.systems
Subject: Re: [seL4] Devel Digest, Vol 41, Issue 11
Hi,
I am going through the SEL4 userspace code of UART driver for TX1/TK1 board but i have some doubts in the below given link..
https://github.com/seL4/util_libs/blob/master/libplatsupport/mach_include/nv...
In serial.h file they are defining IRQ numbers
#define UARTA_IRQ 68
#define UARTB_IRQ 69
#define UARTC_IRQ 78
#define UARTD_IRQ 122
I am not able to find the above IRQ numbers in TX1/TK1 datasheet...
can you please point out where they are referring these IRQ numbers(68, 69, 78, 122)...
Regards
Ashok
________________________________
From: "devel-request@sel4.systems"
To: devel@sel4.systems
Sent: Tuesday, 10 October 2017 6:31 AM
Subject: Devel Digest, Vol 41, Issue 11
Send Devel mailing list submissions to
devel@sel4.systemsmailto:devel@sel4.systems
To subscribe or unsubscribe via the World Wide Web, visit
https://sel4.systems/lists/listinfo/devel
or, via email, send a message with subject or body 'help' to
devel-request@sel4.systemsmailto:devel-request@sel4.systems
You can reach the person managing the list at
devel-owner@sel4.systemsmailto:devel-owner@sel4.systems
When replying, please edit your Subject line so it is more specific
than "Re: Contents of Devel digest..."
Today's Topics:
1. Re: TX1 user-space drivers (Kofidoku.Atuah@data61.csiro.aumailto:Kofidoku.Atuah@data61.csiro.au)
2. Re: sel4Test development Tx1 platform
(Kofidoku.Atuah@data61.csiro.aumailto:Kofidoku.Atuah@data61.csiro.au)
----------------------------------------------------------------------
Message: 1
Date: Mon, 9 Oct 2017 23:32:17 +0000
From: mailto:Kofidoku.Atuah@data61.csiro.au>
To: mailto:devel@sel4.systems>
Subject: Re: [seL4] TX1 user-space drivers
Message-ID: <1507591937169.95333@data61.csiro.aumailto:1507591937169.95333@data61.csiro.au>
Content-Type: text/plain; charset="iso-8859-1"
Munees,
I'm fairly sure that the TX1 can use the UART driver in there, since we have that driver in regression, being tested almost daily on a TX1 board -- that driver is the one used by seL4test on the TX1 in this test here: https://github.com/seL4/sel4test/blob/master/apps/sel4test-tests/src/tests/s...
You also asked whether you have to migrate anything to the TX1. To my knowledge, no, because the TX1 is already running in regression internally, and that UART driver I linked you to is used by the TX1 port with no modifications.
As for your question about the TX2, I cannot comment on whether or not the TX2 works the same as the TX1 because I have no experience with the TX2, since we do not have this board internally, and because seL4 does not officially support the TX2. If you want to port seL4 to the TX2, it would require some effort in figuring out what the differences between the TX1 and TX2 are, as far as I can tell :)
--
Kofi Doku Atuah
Kernel engineer
DATA61 | CSIRO
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://sel4.systems/pipermail/devel/attachments/20171009/819ad9de/attachment...
------------------------------
Message: 2
Date: Mon, 9 Oct 2017 23:44:29 +0000
From: mailto:Kofidoku.Atuah@data61.csiro.au>
To: mailto:devel@sel4.systems>
Subject: Re: [seL4] sel4Test development Tx1 platform
Message-ID: <1507592669981.23274@data61.csiro.aumailto:1507592669981.23274@data61.csiro.au>
Content-Type: text/plain; charset="iso-8859-1"
Hi Muneeswaran,
On the TX1, you can change the type of image that is output by the build process using the following commands:
make configs/tx1_aarch64_debug_xml_defconfig
make menuconfig
Then, from the configuration menu, navigate through these sub-options:
Tools --> Build Elfloader --> Boot image type
And should be able to select "ELF boot image" from the options under that menuitem. Good luck,
--
Kofi Doku Atuah
Kernel engineer
DATA61 | CSIRO
________________________________
From: Devel mailto:devel-bounces@sel4.systems> on behalf of Muneeswaran Rajendran mailto:m.rajendran@matellio.com>
Sent: 07 October 2017 00:37
To: devel@sel4.systemsmailto:devel@sel4.systems
Subject: [seL4] sel4Test development Tx1 platform
Hi All
I able to build sel4Test driver for TX1 platform. but the final outputimage is not a executable image it shows as data format
:~/sel4Test$ file images/sel4test-driver-image-arm-tx1.bin
images/sel4test-driver-image-arm-tx1.bin: data
used 'aarch64-linux-gnu-' toolchain for cross compilation.
but in the kernel obj shows as 64 bit ARM aarch64 format.
~/sel4Test$ file build/kernel/kernel.o
build/kernel/kernel.o: ELF 64-bit LSB relocatable, ARM aarch64, version 1 (SYSV), not stripped
And cross checked in the tk1 platform the generated output file as exe file format.
~/sel4Test$ file images/sel4test-driver-image-arm-tk1
images/sel4test-driver-image-arm-tk1: ELF 32-bit LSB executable, ARM, EABI5 version 1 (SYSV), statically linked, stripped
Can you please someone help me to get final out image as executable format.
Also share the procedure to load the sel4Test driver on TX1 board to verify the test.
Thanks in advance
Munees
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://sel4.systems/pipermail/devel/attachments/20171009/766ac2ba/attachment...
------------------------------
Subject: Digest Footer
_______________________________________________
Devel mailing list
Devel@sel4.systemsmailto:Devel@sel4.systems
https://sel4.systems/lists/listinfo/devel
------------------------------
End of Devel Digest, Vol 41, Issue 11
*************************************