Hi Leonid,
It looks like the seL4 v8.0.0 does not include Armv8 virtualization extension support yet ...
So basically you wrote the VMM based on the libsel4armvmm?
I am a bit confused by the interrupt log you provided.
It looks like the log output depends on getting kernel timer interrupts.
case IRQTimer:
timerTick();
resetTimer();
if ((++tickCount % 200) == 0)
{
printInt(0);
printf("- - - \n");
printInt(1);
printf("- - - \n");
printInt(2);
printf("- - - \n");
printInt(3);
printf("- - - - - - - \n");
cleanIntStat();
}
break;
---irq stat: cpu=0 (2) 26_50_50 0_258_258
- - -
---irq stat: cpu=1 (2) 26_50_50 0_258_258
- - -
---irq stat: cpu=2 (2) 26_50_50 0_258_258
- - -
---irq stat: cpu=3 (3) 26_50_50 65_1_1 59_1_1
- - - - - - -
---irq stat: cpu=0 (2) 26_50_50 0_257_257
- - -
---irq stat: cpu=1 (2) 26_50_50 0_280_280
- - -
---irq stat: cpu=2 (2) 26_50_50 0_280_280
I am a bit confused, and correct me if I am wrong. If you do not get kernel timer interrupts, how could you get the output above? I guess at least one core got kernel timer interrupts to get the output?
Regards,
Yanyan
-----Original Message-----
From: Leonid Meyerovich
Hello,
We are running seL4 microkernel on 4 cores Zynq UltraScale+ (zcu102 board). The implementation includes multiple processes, hypervisor and virtual machine running on dedicated core. After several hours running (it could be 2 or even 8 hours) the whole microkernel locks up. After some investigation I have found that no interrupts generated anymore - at least there is no interrupts coming to ISR. Inside ISR I have monitored PL2 Physical Timer Control register, which feeds a scheduler and didn't find any problems - it stays enabled and not masked.
I will appreciate any idea/direction for approaching this problem.
Thank you,
Leonid
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