November 2021 - Devel - lists.sel4.systems

Stuck during invalidate local TLB in Tx2
by Muneeswaran Rajendran 16 Oct '24

16 Oct '24

Hi seL4 Dev team, Can someone explain the reason (share the reference) to invalidate the local TLB during kernel vspace activation as part CPU initialisation. The Tx2 board stuck while performing this operation. As per my understanding both Tx1 and Tx2 are using same A57 core. so the TLB initialisation and invalidation remain same for Tx2 and should not stuck during invalidation.Please correct me if anything wrong here. I understand from that instruction (tlbi vmalle1) which is invalidating stage 1 entries associated to the current VMID. Also from arm mmu code the seL4 setting up (TCR_EL1) TCR register addressing space as 48bit, ASID as 16bit and page table setup 4k granular size. I am using MRS macro to dump the spsr_el1 and dspsr_el0 register to see the state of processor but its throwing synchronous exception. Do we have any other option to dump all the register content to see the state of processor like we have one in 'sel4debug_dump_registers' which is used in sel4test code. Regards, Muneeswaran R

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Questions about Memory Management in seL4
by Daniel Wang 19 May '23

19 May '23

Hi all, Sorry to bother, I have some basic questions about seL4 memory management. Can someone help me? 1. where is the kernel’s address space? I know there are basically three methods: a) separate virtual address space, e.g. through changing page tables on entry into privileged mode to access b) physical space, e.g. through disable automatic hardware translation of virtual addresses on entry into privilege mode c) privilege region in each process’s virtual address space, e.g. through page table to map kernel address into use-mode process. My question is which of this is being used by seL4 microkernel? 2. Objects like CSpace, VSpace, CNode, TCB, Endpoint, etc. are called kernel objects, but it seems all dynamically allocated in thread running/creating time. Are those objects (e.g. Figure 3.3 in seL4 manual) in kernel space or in user space? 3. I read that after the kernel boot up, it passes all resources, untyped memory to the first thread. Are those untyped memory physical memory or virtual memory in a single page? The reason I ask is I’m learning the code of the UNSW AOS project (two of the assignment projects are implementing frame and papers). I’m confused that before the implementation of frames and pages what kind of memory is passed to the the first thread? I saw int AOS project, it uses ut_table_init(), ut_steal_mem(), I wonder what kind of memory it operates on? Thanks -Dan

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seL4 developer hangout/video call
by Gerwin Klein 25 Jan '22

25 Jan '22

Hi seL4 devs, a few of us thought it might be nice to talk more directly from time to time rather than only via pull requests, so we're trialling a seL4 developer hangout/video chat. The idea for this is to be: - informal, about 1h - for technical discussions about seL4 and related repositories - anyone can join - every two weeks, initially for 3 times, then we can decide how we like it At least one or two technical steering committee (TSC) members will try to be at every one of these, but these are not TSC meetings where formal decisions are made, just technical discussions about whatever people have on their minds. To provide a starting topic, one thing we'd be interested in is: seL4 boot code There have been quite a few pull requests in that area, and it'd be nice to know what people's plans are and how we can keep this part of seL4 high assurance while making it more flexible. Other topics for future meetings could be better support for other language bindings (e.g. Rust), any RFCs that are open or people are thinking about opening, or just discussions about current pull requests or issues. The first hangout is on - Sydney: Wed, Nov 3, 8am - Central Europe: Tue, Nov 2, 10pm - US East Coast: Tue, Nov 2, 2pm Zoom link: https://unsw.zoom.us/j/82640784431 Cheers, Gerwin

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capdl-loader questions
by Sam Leffler 08 Dec '21

08 Dec '21

I've been investigating how capd-loader works and have some questions. My apologies if these were previously discussed. 1. CDL_Model is mutable. The capDL specification looks like a perfect candidate for being in .rodata but it's stored+treated as mutable. Why? I see capdl-loader uses the mutability to store mapped page frame caps and, for risc-v, VSpace roots, but both can be easily handled w/o modifying the spec. Having this immutable has many benefits. 2. All page frames are treated as shared. CAPDL_SHARED_FRAMES is #define'd in the code so every frame is treated as shared. This inflates the size of the orig_caps array and the kernel capabilities table but seems unnecessary. Why? I've verified that instead of doing the Copy op on each page you can just check the return of the seL4_Page_Map call and if necessary clone the cap. Better would be for camkes to identify shared page frames so this doesn't require 2x syscalls (which spam's the console w/ CONFIG_PRINTING enabled). 3. Why does copy_addr_with_pt exist? There are two memory regions created for mapping page frames into the rootserver address space for doing fill ops. One is 64KB and the other is 1 page (nominally 4KB). init_frame tries the 4KB region first then falls back to the 64K region if mapping into the 4KB region fails. Why (i.e. why would the 1st mapping call fail)? On my risc-v system I never use the 64K region and I'm not sure when it might be used? Even if it were used, why is 64K always allocated; seems like the region should be sized according to the target platform. Having this extra region has a cost that can be significant on small systems. 4. console output. Why is sel4_DebugPutChar (or similar) not a standard part of the kernel? This forces capdl-loader to depend on libsel4platsupport for console output which in turn affects cap space. I can't imagine an seL4 system that cannot write to the console and I think it's entirely reasonable to have a critical system service like the rootserver use that. 5. duplicate_caps. The scheme for constructing a running system from a spec is straightforward except for duplicating caps. Why are all TCB's and CNode caps dup'd? Why does init_tcbs call init_tcb on the original object but immediately configure_tcb on the dup? There are other places where the dup cap is used instead of the original cap (e.g. init_cnode_slot). None of this seems to matter on risc-v; maybe this matters on some other architectures? 6. On risc-v all pages appear to be marked executable--including ipc buffers! This seems just wrong and a potential security hole. 7. Why does seL4_TCB_WriteRegisters take a _mutable_ seL4_UserContext? I'm guessing this is a mistake in the xml spec (but haven't looked). 8. init_cspaces mystifies me. There are two loops over all CNodes; one that does "COPY" operations and one that does "MOVE" operations. I see nothing explaining what's happening. I've read this code many times and still don't get it; please explain. 9. According to comments, the use of a global static to setup the UserContext for a new TCB is done because one cannot take the address of a local variable. On what architecture is this true? On risc-v the context is copied into "registers" before calling the kernel so this doesn't appear to be an issue with crossing the user-kernel protection boundary. 10. Memory reclamation. I'm unclear what happens to the memory used by capdl-loader. The process does a TCB_Suspend call when it's done. Does this cause the CSpace & VSpace to be reclaimed? For CAmkES this doesn't matter as there's no support for allocating memory but I'm building a system where this isn't true. How do I release memory (in particular) back to the untyped pool? I have a bunch of niggly code complaints/questions but let's start with the above. -Sam

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VM Kernel Modules
by Michael Neises 20 Nov '21

20 Nov '21

Hello all, I recently spent a lot of time getting the camkes-vm-linux tutorial to work, because it is the only example I could find of compiling a kernel module for the linux vm as a part of the camkes build process. Unfortunately, the kernel module doesn't seem to work. For more information, see the previous email chain as well as https://github.com/NeisesResearch/vm_measure/wiki/Building-the-camkes_vm_li… . In lieu of doing things the right way, I believe I could compile a kernel module for the linux kernel that is provided as part of the camkes build system. I believe this is how the introspect-app accomplishes its work. However, I need to have the exact kernel and exact configuration in order to compile the kernel module correctly. Can anyone point me to the correct kernel version and configuration, so that I can target the provided linux kernel for module compilation? Or if there's a better way to get a kernel module in there, please let me know. Cheers, Michael Neises

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the security whiltelist of smc call 答复: Devel Digest, Vol 124, Issue 1
by yadong.li 19 Nov '21

19 Nov '21

Hi: In our ARMv8 platform，we access secure world not only from the VM guest OS， but also form native compont like config clk register In ARMv8 platform, SMC instructions are not allowed from EL0. So in camkes-vm project, I create a new smc capability and a new syscall as a temporary solution, like below: "LIBSEL4_INLINE seL4_ARM_SMC_CallFunc_t seL4_ARM_SMC_CallFunc(seL4_ARM_SMC _service, seL4_Word function_id, seL4_Word arg0, seL4_Word arg1, seL4_Word arg2)" But I did not pay much attention to security, it is just meet our current work. I didnot really understand the essence of kernel whitelist mentioned by "https://sel4.atlassian.net/browse/RFC-9"? I have some question below, I feel the smc cap should like schedcontrol cap belong every core. 1. what is the whiltelist describe ? sip command smc function id? 2. how are the members of whilelist represented in the kernel , check the invLabel of syscall in kernel if we provide one smc cap not every function id? or just check the range of function id ? 3. Does each TCB have its own whitelist or does the entire system have a whitelist? thank you very much. -----邮件原件----- 发件人: devel-request(a)sel4.systems [mailto:devel-request@sel4.systems] 发送时间: 2021年11月10日 9:00 收件人: devel(a)sel4.systems 主题: Devel Digest, Vol 124, Issue 1 Send Devel mailing list submissions to devel(a)sel4.systems To subscribe or unsubscribe via email, send a message with subject or body 'help' to devel-request(a)sel4.systems You can reach the person managing the list at devel-owner(a)sel4.systems When replying, please edit your Subject line so it is more specific than "Re: Contents of Devel digest..." Today's Topics: 1. RFC-9: new capability for seL4 SMC Forwarding on Arm (Gerwin Klein) ---------------------------------------------------------------------- Message: 1 Date: Tue, 9 Nov 2021 21:52:58 +0000 From: Gerwin Klein <kleing(a)unsw.edu.au> Subject: [seL4] RFC-9: new capability for seL4 SMC Forwarding on Arm To: devel <devel(a)sel4.systems> Message-ID: <613858AC-3DB1-4D7C-A892-9ABDB5B31D58(a)unsw.edu.au> Content-Type: text/plain; charset="utf-8" I’d like to solicit discussion on the new RFC on forwarding Secure Monitor Calls on Arm: https://sel4.atlassian.net/browse/RFC-9 Relevant Arm documentation (SMC calling conventions): https://developer.arm.com/documentation/den0028/latest?_ga=2.116565828.3903… Any opinions, concerns, alternative designs? Cheers, Gerwin ------------------------------ Subject: Digest Footer _______________________________________________ Devel mailing list -- devel(a)sel4.systems To unsubscribe send an email to devel-leave(a)sel4.systems ------------------------------ End of Devel Digest, Vol 124, Issue 1 *************************************

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Got it, Thank you for your help. 答复: Devel Digest, Vol 125, Issue 2
by yadong.li 18 Nov '21

18 Nov '21

-----邮件原件----- 发件人: devel-request(a)sel4.systems [mailto:devel-request@sel4.systems] 发送时间: 2021年11月18日 5:56 收件人: devel(a)sel4.systems 主题: Devel Digest, Vol 125, Issue 2 Send Devel mailing list submissions to devel(a)sel4.systems To subscribe or unsubscribe via email, send a message with subject or body 'help' to devel-request(a)sel4.systems You can reach the person managing the list at devel-owner(a)sel4.systems When replying, please edit your Subject line so it is more specific than "Re: Contents of Devel digest..." Today's Topics: 1. Re: some question about seL4 performance (Gerwin Klein) 2. Re: some question about seL4 performance (Gernot Heiser) 3. Re: some question about seL4 performance (Gerwin Klein) ---------------------------------------------------------------------- Message: 1 Date: Wed, 17 Nov 2021 21:24:57 +0000 From: Gerwin Klein <kleing(a)unsw.edu.au> Subject: [seL4] Re: some question about seL4 performance To: yadong.li <yadong.li(a)horizon.ai> Cc: "devel(a)sel4.systems" <devel(a)sel4.systems> Message-ID: <CA210292-C334-42C1-9FB4-48CAFDE8CCC6(a)unsw.edu.au> Content-Type: text/plain; charset="utf-8" > On 18 Nov 2021, at 02:06, yadong.li <yadong.li(a)horizon.ai> wrote: > > Hi： > I learn the sel4 performance form > https://sel4.systems/About/Performance/ > I focus on the ARMv8 platform, from the website, the parameters are as follows: > ISA Mode Core/SoC/Board Clock IRQ Invoke IPC call IPC reply > "Armv8a 64 A57/Tx1/Jetson 1.9 GHz 863 (18) 396(15) 397(4)" > > I want to know what is the length of IPC for the record provided on the web page , when test IPC call and reply? 0 or 10? The page reports the 0-length numbers. The idea is that IPC should fit into registers, the 10 case is the one that make it spill into memory deliberately. That number is good to know for development, but should not be the main performance characteristic. Cheers, Gerwin ------------------------------ Message: 2 Date: Wed, 17 Nov 2021 21:36:39 +0000 From: Gernot Heiser <gernot(a)unsw.edu.au> Subject: [seL4] Re: some question about seL4 performance To: "devel(a)sel4.systems" <devel(a)sel4.systems> Message-ID: <9885F4AB-61C0-46CD-B239-595E38482673(a)unsw.edu.au> Content-Type: text/plain; charset="utf-8" On 18 Nov 2021, at 08:24, Gerwin Klein <kleing(a)unsw.edu.au> wrote: > > The page reports the 0-length numbers. The idea is that IPC should fit into registers, the 10 case is the one that make it spill into memory deliberately. That number is good to know for development, but should not be the main performance characteristic. Note that whether data is transferred solely in registers or using a memory buffer does not make a big difference on contemporary hardware. However, our present implementation reverts to the slow path as soon as the message size overflows the physical message registers, which will make the PIC much slower. This is something that could be fixed by widening the fastpath conditions without much complications. However, we haven’t yet come across an important use case where this matters, so there isn’t much motivation for investing time in it. Gernot ------------------------------ Message: 3 Date: Wed, 17 Nov 2021 21:56:06 +0000 From: Gerwin Klein <kleing(a)unsw.edu.au> Subject: [seL4] Re: some question about seL4 performance To: Gernot Heiser <gernot(a)unsw.edu.au> Cc: "devel(a)sel4.systems" <devel(a)sel4.systems> Message-ID: <FFD95815-9F62-4A90-A3D0-59671152494D(a)unsw.edu.au> Content-Type: text/plain; charset="us-ascii" On 18 Nov 2021, at 08:36, Gernot Heiser <gernot(a)unsw.edu.au<mailto:gernot@unsw.edu.au>> wrote: On 18 Nov 2021, at 08:24, Gerwin Klein <kleing(a)unsw.edu.au<mailto:kleing@unsw.edu.au>> wrote: The page reports the 0-length numbers. The idea is that IPC should fit into registers, the 10 case is the one that make it spill into memory deliberately. That number is good to know for development, but should not be the main performance characteristic. Note that whether data is transferred solely in registers or using a memory buffer does not make a big difference on contemporary hardware. However, our present implementation reverts to the slow path as soon as the message size overflows the physical message registers, which will make the PIC much slower. Yes I should have mentioned that. If you look at the raw numbers for x86, eg. at https://github.com/seL4/sel4bench/actions/runs/1469475721#artifacts, fast path/no fast path is almost equal for length 10. You get a tiny bit better performance for length 10 when the fast path is switched off completely, because it doesn't first have to test whether to take the fast path or not. Cheers, Gerwin ------------------------------ Subject: Digest Footer _______________________________________________ Devel mailing list -- devel(a)sel4.systems To unsubscribe send an email to devel-leave(a)sel4.systems ------------------------------ End of Devel Digest, Vol 125, Issue 2 *************************************

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some question about seL4 performance
by yadong.li 18 Nov '21

18 Nov '21

Hi： I learn the sel4 performance form https://sel4.systems/About/Performance/ I focus on the ARMv8 platform, from the website, the parameters are as follows: ISA Mode Core/SoC/Board Clock IRQ Invoke IPC call IPC reply "Armv8a 64 A57/Tx1/Jetson 1.9 GHz 863 (18) 396(15) 397(4)" I want to know what is the length of IPC for the record provided on the web page , when test IPC call and reply? 0 or 10? thank you very much

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Crash problem, CAmkES-VM app with Ethernet passthrough
by hamed_ganji＠aut.ac.ir 18 Nov '21

18 Nov '21

Hello everyone, I attempt to make a simple CAmkES-VM app to load a Linux VM with Ethernet passthrough. After running, Linux kernel crashes while initializing the device (e1000). Can anyone guide me how to fix the problem, please. Thanks in advance. The used qemu command: ------------------------------------------------------------ $ qemu-system-x86_64 -machine q35,accel=kvm,kernel-irqchip=split -cpu Nehalem,+vme,+pdpe1gb,+xsave,+xsaveopt,+xsavec,+fsgsbase,+pcid,+invpcid,enforce,+vmx -nographic -serial mon:stdio -m size=4G -enable-kvm -device intel-iommu,intremap=off -net nic,model=e1000 -net tap,script=no,ifname=tap0 -kernel images/kernel-x86_64-pc99 -initrd images/capdl-loader-image-x86_64-pc99 ------------------------------------------------------------ Here is my CAmkES app definition: ------------------------------------------------------------ import <VM/vm.camkes>; #include <configurations/vm.h> #define VM_GUEST_CMDLINE "earlyprintk=ttyS0,115200 console=ttyS0,115200 i8042.nokbd=y i8042.nomux=y \ i8042.noaux=y io_delay=udelay noisapnp pci=nomsi debug root=/dev/mem" // nosmap acpi=off" component Init0 { VM_INIT_DEF() } assembly { composition { VM_COMPOSITION_DEF() VM_PER_VM_COMP_DEF(0) } configuration { VM_CONFIGURATION_DEF() VM_PER_VM_CONFIG_DEF(0) vm0.simple_untyped25_pool = 75; vm0.cnode_size_bits = 24; vm0.heap_size = 0x2000000; vm0.guest_ram_mb = 2048; vm0.kernel_cmdline = VM_GUEST_CMDLINE; vm0.kernel_image = "bzimage"; vm0.kernel_relocs = "bzimage"; vm0.initrd_image = "rootfs.cpio"; vm0.iospace_domain = 0x0f; vm0.pci_devices_iospace = 1; vm0.vm_ioports = [ {"start":0xc000, "end":0xc040, "pci_device":2, "name":"eth"}, ]; vm0.pci_devices = [ { "name":"eth", "bus":0, "dev":2, "fun":0, "irq":"eth_irq", "memory":[ {"paddr":0xfeb00000, "size":0x80000, "page_bits":12}, {"paddr":0xfeb80000, "size":0x20000, "page_bits":12} ] }, ]; vm0.vm_irqs = [ {"name":"eth_irq", "source":1, "level_trig":1, "active_low":1, "dest":11}, ]; } } ------------------------------------------------------------ The output lines: ------------------------------------------------------------ Booting from ROM..Boot config: debug_port = 0x3f8 Boot config: disable_iommu = false Detected 1 boot module(s): module #0: start=0xa1f000 end=0x1edbe18 size=0x14bce18 name='images/capdl-loader-image-x86_64-pc99' Parsing GRUB physical memory map Physical Memory Region from 0 size 9fc00 type 1 Physical Memory Region from 9fc00 size 400 type 2 Physical Memory Region from f0000 size 10000 type 2 Physical Memory Region from 100000 size 7fedf000 type 1 Adding physical memory region 0x100000-0x7ffdf000 Physical Memory Region from 7ffdf000 size 21000 type 2 Physical Memory Region from b0000000 size 10000000 type 2 Physical Memory Region from fed1c000 size 4000 type 2 Physical Memory Region from feffc000 size 4000 type 2 Physical Memory Region from fffc0000 size 40000 type 2 Physical Memory Region from 100000000 size 80000000 type 1 Adding physical memory region 0x100000000-0x180000000 Multiboot gave us no video information ACPI: RSDP paddr=0xf5ac0 ACPI: RSDP vaddr=0xf5ac0 ACPI: RSDT paddr=0x7ffe2140 ACPI: RSDT vaddr=0x7ffe2140 Kernel loaded to: start=0x100000 end=0xa1e000 size=0x91e000 entry=0x1012db ACPI: RSDT paddr=0x7ffe2140 ACPI: RSDT vaddr=0x7ffe2140 ACPI: FADT paddr=0x7ffe1f18 ACPI: FADT vaddr=0x7ffe1f18 ACPI: FADT flags=0x84a5 ACPI: DMAR paddr=0x7ffe20f8 ACPI: DMAR vaddr=0x7ffe20f8 ACPI: IOMMU host address width: 39 ACPI: 1 IOMMUs detected ACPI: MADT paddr=0x7ffe200c ACPI: MADT vaddr=0x7ffe200c ACPI: MADT apic_addr=0xfee00000 ACPI: MADT flags=0x1 ACPI: MADT_APIC apic_id=0x0 ACPI: MADT_IOAPIC ioapic_id=0 ioapic_addr=0xfec00000 gsib=0 ACPI: MADT_ISO bus=0 source=0 gsi=2 flags=0x0 ACPI: MADT_ISO bus=0 source=5 gsi=5 flags=0xd ACPI: MADT_ISO bus=0 source=9 gsi=9 flags=0xd ACPI: MADT_ISO bus=0 source=10 gsi=10 flags=0xd ACPI: MADT_ISO bus=0 source=11 gsi=11 flags=0xd ACPI: 1 CPU(s) detected ELF-loading userland images from boot modules: size=0x294b000 v_entry=0x408619 v_start=0x400000 v_end=0x2d4b000 p_start=0x1edc000 p_end=0x4827000 Moving loaded userland images to final location: from=0x1edc000 to=0xa1e000 size=0x294b000 Starting node #0 with APIC ID 0 Mapping kernel window is done IOMMU 0x0: 16-bit domain IDs supported IOMMU: Using 3 page-table levels (max. supported: 3) IOMMU: Create VTD context table for PCI bus 0x0 (pptr=0xffffff817e01d000) IOMMU: Create VTD context table for PCI bus 0x1 (pptr=0xffffff817e01e000) IOMMU: Create VTD context table for PCI bus 0x2 (pptr=0xffffff817e01f000) IOMMU: Create VTD context table for PCI bus 0x3 (pptr=0xffffff817e020000) IOMMU: Create VTD context table for PCI bus 0x4 (pptr=0xffffff817e021000) IOMMU: Create VTD context table for PCI bus 0x5 (pptr=0xffffff817e022000) IOMMU: Create VTD context table for PCI bus 0x6 (pptr=0xffffff817e023000) IOMMU: Create VTD context table for PCI bus 0x7 (pptr=0xffffff817e024000) IOMMU: Create VTD context table for PCI bus 0x8 (pptr=0xffffff817e025000) IOMMU: Create VTD context table for PCI bus 0x9 (pptr=0xffffff817e026000) IOMMU: Create VTD context table for PCI bus 0xa (pptr=0xffffff817e027000) IOMMU: Create VTD context table for PCI bus 0xb (pptr=0xffffff817e028000) IOMMU: Create VTD context table for PCI bus 0xc (pptr=0xffffff817e029000) IOMMU: Create VTD context table for PCI bus 0xd (pptr=0xffffff817e02a000) IOMMU: Create VTD context table for PCI bus 0xe (pptr=0xffffff817e02b000) IOMMU: Create VTD context table for PCI bus 0xf (pptr=0xffffff817e02c000) IOMMU: Create VTD context table for PCI bus 0x10 (pptr=0xffffff817e02d000) IOMMU: Create VTD context table for PCI bus 0x11 (pptr=0xffffff817e02e000) IOMMU: Create VTD context table for PCI bus 0x12 (pptr=0xffffff817e02f000) IOMMU: Create VTD context table for PCI bus 0x13 (pptr=0xffffff817e030000) IOMMU: Create VTD context table for PCI bus 0x14 (pptr=0xffffff817e031000) IOMMU: Create VTD context table for PCI bus 0x15 (pptr=0xffffff817e032000) IOMMU: Create VTD context table for PCI bus 0x16 (pptr=0xffffff817e033000) IOMMU: Create VTD context table for PCI bus 0x17 (pptr=0xffffff817e034000) IOMMU: Create VTD context table for PCI bus 0x18 (pptr=0xffffff817e035000) IOMMU: Create VTD context table for PCI bus 0x19 (pptr=0xffffff817e036000) IOMMU: Create VTD context table for PCI bus 0x1a (pptr=0xffffff817e037000) IOMMU: Create VTD context table for PCI bus 0x1b (pptr=0xffffff817e038000) IOMMU: Create VTD context table for PCI bus 0x1c (pptr=0xffffff817e039000) IOMMU: Create VTD context table for PCI bus 0x1d (pptr=0xffffff817e03a000) IOMMU: Create VTD context table for PCI bus 0x1e (pptr=0xffffff817e03b000) IOMMU: Create VTD context table for PCI bus 0x1f (pptr=0xffffff817e03c000) IOMMU: Create VTD context table for PCI bus 0x20 (pptr=0xffffff817e03d000) IOMMU: Create VTD context table for PCI bus 0x21 (pptr=0xffffff817e03e000) IOMMU: Create VTD context table for PCI bus 0x22 (pptr=0xffffff817e03f000) IOMMU: Create VTD context table for PCI bus 0x23 (pptr=0xffffff817e040000) IOMMU: Create VTD context table for PCI bus 0x24 (pptr=0xffffff817e041000) IOMMU: Create VTD context table for PCI bus 0x25 (pptr=0xffffff817e042000) IOMMU: Create VTD context table for PCI bus 0x26 (pptr=0xffffff817e043000) IOMMU: Create VTD context table for PCI bus 0x27 (pptr=0xffffff817e044000) IOMMU: Create VTD context table for PCI bus 0x28 (pptr=0xffffff817e045000) IOMMU: Create VTD context table for PCI bus 0x29 (pptr=0xffffff817e046000) IOMMU: Create VTD context table for PCI bus 0x2a (pptr=0xffffff817e047000) IOMMU: Create VTD context table for PCI bus 0x2b (pptr=0xffffff817e048000) IOMMU: Create VTD context table for PCI bus 0x2c (pptr=0xffffff817e049000) IOMMU: Create VTD context table for PCI bus 0x2d (pptr=0xffffff817e04a000) IOMMU: Create VTD context table for PCI bus 0x2e (pptr=0xffffff817e04b000) IOMMU: Create VTD context table for PCI bus 0x2f (pptr=0xffffff817e04c000) IOMMU: Create VTD context table for PCI bus 0x30 (pptr=0xffffff817e04d000) IOMMU: Create VTD context table for PCI bus 0x31 (pptr=0xffffff817e04e000) IOMMU: Create VTD context table for PCI bus 0x32 (pptr=0xffffff817e04f000) IOMMU: Create VTD context table for PCI bus 0x33 (pptr=0xffffff817e050000) IOMMU: Create VTD context table for PCI bus 0x34 (pptr=0xffffff817e051000) IOMMU: Create VTD context table for PCI bus 0x35 (pptr=0xffffff817e052000) IOMMU: Create VTD context table for PCI bus 0x36 (pptr=0xffffff817e053000) IOMMU: Create VTD context table for PCI bus 0x37 (pptr=0xffffff817e054000) IOMMU: Create VTD context table for PCI bus 0x38 (pptr=0xffffff817e055000) IOMMU: Create VTD context table for PCI bus 0x39 (pptr=0xffffff817e056000) IOMMU: Create VTD context table for PCI bus 0x3a (pptr=0xffffff817e057000) IOMMU: Create VTD context table for PCI bus 0x3b (pptr=0xffffff817e058000) IOMMU: Create VTD context table for PCI bus 0x3c (pptr=0xffffff817e059000) IOMMU: Create VTD context table for PCI bus 0x3d (pptr=0xffffff817e05a000) IOMMU: Create VTD context table for PCI bus 0x3e (pptr=0xffffff817e05b000) IOMMU: Create VTD context table for PCI bus 0x3f (pptr=0xffffff817e05c000) IOMMU: Create VTD context table for PCI bus 0x40 (pptr=0xffffff817e05d000) IOMMU: Create VTD context table for PCI bus 0x41 (pptr=0xffffff817e05e000) IOMMU: Create VTD context table for PCI bus 0x42 (pptr=0xffffff817e05f000) IOMMU: Create VTD context table for PCI bus 0x43 (pptr=0xffffff817e060000) IOMMU: Create VTD context table for PCI bus 0x44 (pptr=0xffffff817e061000) IOMMU: Create VTD context table for PCI bus 0x45 (pptr=0xffffff817e062000) IOMMU: Create VTD context table for PCI bus 0x46 (pptr=0xffffff817e063000) IOMMU: Create VTD context table for PCI bus 0x47 (pptr=0xffffff817e064000) IOMMU: Create VTD context table for PCI bus 0x48 (pptr=0xffffff817e065000) IOMMU: Create VTD context table for PCI bus 0x49 (pptr=0xffffff817e066000) IOMMU: Create VTD context table for PCI bus 0x4a (pptr=0xffffff817e067000) IOMMU: Create VTD context table for PCI bus 0x4b (pptr=0xffffff817e068000) IOMMU: Create VTD context table for PCI bus 0x4c (pptr=0xffffff817e069000) IOMMU: Create VTD context table for PCI bus 0x4d (pptr=0xffffff817e06a000) IOMMU: Create VTD context table for PCI bus 0x4e (pptr=0xffffff817e06b000) IOMMU: Create VTD context table for PCI bus 0x4f (pptr=0xffffff817e06c000) IOMMU: Create VTD context table for PCI bus 0x50 (pptr=0xffffff817e06d000) IOMMU: Create VTD context table for PCI bus 0x51 (pptr=0xffffff817e06e000) IOMMU: Create VTD context table for PCI bus 0x52 (pptr=0xffffff817e06f000) IOMMU: Create VTD context table for PCI bus 0x53 (pptr=0xffffff817e070000) IOMMU: Create VTD context table for PCI bus 0x54 (pptr=0xffffff817e071000) IOMMU: Create VTD context table for PCI bus 0x55 (pptr=0xffffff817e072000) IOMMU: Create VTD context table for PCI bus 0x56 (pptr=0xffffff817e073000) IOMMU: Create VTD context table for PCI bus 0x57 (pptr=0xffffff817e074000) IOMMU: Create VTD context table for PCI bus 0x58 (pptr=0xffffff817e075000) IOMMU: Create VTD context table for PCI bus 0x59 (pptr=0xffffff817e076000) IOMMU: Create VTD context table for PCI bus 0x5a (pptr=0xffffff817e077000) IOMMU: Create VTD context table for PCI bus 0x5b (pptr=0xffffff817e078000) IOMMU: Create VTD context table for PCI bus 0x5c (pptr=0xffffff817e079000) IOMMU: Create VTD context table for PCI bus 0x5d (pptr=0xffffff817e07a000) IOMMU: Create VTD context table for PCI bus 0x5e (pptr=0xffffff817e07b000) IOMMU: Create VTD context table for PCI bus 0x5f (pptr=0xffffff817e07c000) IOMMU: Create VTD context table for PCI bus 0x60 (pptr=0xffffff817e07d000) IOMMU: Create VTD context table for PCI bus 0x61 (pptr=0xffffff817e07e000) IOMMU: Create VTD context table for PCI bus 0x62 (pptr=0xffffff817e07f000) IOMMU: Create VTD context table for PCI bus 0x63 (pptr=0xffffff817e080000) IOMMU: Create VTD context table for PCI bus 0x64 (pptr=0xffffff817e081000) IOMMU: Create VTD context table for PCI bus 0x65 (pptr=0xffffff817e082000) IOMMU: Create VTD context table for PCI bus 0x66 (pptr=0xffffff817e083000) IOMMU: Create VTD context table for PCI bus 0x67 (pptr=0xffffff817e084000) IOMMU: Create VTD context table for PCI bus 0x68 (pptr=0xffffff817e085000) IOMMU: Create VTD context table for PCI bus 0x69 (pptr=0xffffff817e086000) IOMMU: Create VTD context table for PCI bus 0x6a (pptr=0xffffff817e087000) IOMMU: Create VTD context table for PCI bus 0x6b (pptr=0xffffff817e088000) IOMMU: Create VTD context table for PCI bus 0x6c (pptr=0xffffff817e089000) IOMMU: Create VTD context table for PCI bus 0x6d (pptr=0xffffff817e08a000) IOMMU: Create VTD context table for PCI bus 0x6e (pptr=0xffffff817e08b000) IOMMU: Create VTD context table for PCI bus 0x6f (pptr=0xffffff817e08c000) IOMMU: Create VTD context table for PCI bus 0x70 (pptr=0xffffff817e08d000) IOMMU: Create VTD context table for PCI bus 0x71 (pptr=0xffffff817e08e000) IOMMU: Create VTD context table for PCI bus 0x72 (pptr=0xffffff817e08f000) IOMMU: Create VTD context table for PCI bus 0x73 (pptr=0xffffff817e090000) IOMMU: Create VTD context table for PCI bus 0x74 (pptr=0xffffff817e091000) IOMMU: Create VTD context table for PCI bus 0x75 (pptr=0xffffff817e092000) IOMMU: Create VTD context table for PCI bus 0x76 (pptr=0xffffff817e093000) IOMMU: Create VTD context table for PCI bus 0x77 (pptr=0xffffff817e094000) IOMMU: Create VTD context table for PCI bus 0x78 (pptr=0xffffff817e095000) IOMMU: Create VTD context table for PCI bus 0x79 (pptr=0xffffff817e096000) IOMMU: Create VTD context table for PCI bus 0x7a (pptr=0xffffff817e097000) IOMMU: Create VTD context table for PCI bus 0x7b (pptr=0xffffff817e098000) IOMMU: Create VTD context table for PCI bus 0x7c (pptr=0xffffff817e099000) IOMMU: Create VTD context table for PCI bus 0x7d (pptr=0xffffff817e09a000) IOMMU: Create VTD context table for PCI bus 0x7e (pptr=0xffffff817e09b000) IOMMU: Create VTD context table for PCI bus 0x7f (pptr=0xffffff817e09c000) IOMMU: Create VTD context table for PCI bus 0x80 (pptr=0xffffff817e09d000) IOMMU: Create VTD context table for PCI bus 0x81 (pptr=0xffffff817e09e000) IOMMU: Create VTD context table for PCI bus 0x82 (pptr=0xffffff817e09f000) IOMMU: Create VTD context table for PCI bus 0x83 (pptr=0xffffff817e0a0000) IOMMU: Create VTD context table for PCI bus 0x84 (pptr=0xffffff817e0a1000) IOMMU: Create VTD context table for PCI bus 0x85 (pptr=0xffffff817e0a2000) IOMMU: Create VTD context table for PCI bus 0x86 (pptr=0xffffff817e0a3000) IOMMU: Create VTD context table for PCI bus 0x87 (pptr=0xffffff817e0a4000) IOMMU: Create VTD context table for PCI bus 0x88 (pptr=0xffffff817e0a5000) IOMMU: Create VTD context table for PCI bus 0x89 (pptr=0xffffff817e0a6000) IOMMU: Create VTD context table for PCI bus 0x8a (pptr=0xffffff817e0a7000) IOMMU: Create VTD context table for PCI bus 0x8b (pptr=0xffffff817e0a8000) IOMMU: Create VTD context table for PCI bus 0x8c (pptr=0xffffff817e0a9000) IOMMU: Create VTD context table for PCI bus 0x8d (pptr=0xffffff817e0aa000) IOMMU: Create VTD context table for PCI bus 0x8e (pptr=0xffffff817e0ab000) IOMMU: Create VTD context table for PCI bus 0x8f (pptr=0xffffff817e0ac000) IOMMU: Create VTD context table for PCI bus 0x90 (pptr=0xffffff817e0ad000) IOMMU: Create VTD context table for PCI bus 0x91 (pptr=0xffffff817e0ae000) IOMMU: Create VTD context table for PCI bus 0x92 (pptr=0xffffff817e0af000) IOMMU: Create VTD context table for PCI bus 0x93 (pptr=0xffffff817e0b0000) IOMMU: Create VTD context table for PCI bus 0x94 (pptr=0xffffff817e0b1000) IOMMU: Create VTD context table for PCI bus 0x95 (pptr=0xffffff817e0b2000) IOMMU: Create VTD context table for PCI bus 0x96 (pptr=0xffffff817e0b3000) IOMMU: Create VTD context table for PCI bus 0x97 (pptr=0xffffff817e0b4000) IOMMU: Create VTD context table for PCI bus 0x98 (pptr=0xffffff817e0b5000) IOMMU: Create VTD context table for PCI bus 0x99 (pptr=0xffffff817e0b6000) IOMMU: Create VTD context table for PCI bus 0x9a (pptr=0xffffff817e0b7000) IOMMU: Create VTD context table for PCI bus 0x9b (pptr=0xffffff817e0b8000) IOMMU: Create VTD context table for PCI bus 0x9c (pptr=0xffffff817e0b9000) IOMMU: Create VTD context table for PCI bus 0x9d (pptr=0xffffff817e0ba000) IOMMU: Create VTD context table for PCI bus 0x9e (pptr=0xffffff817e0bb000) IOMMU: Create VTD context table for PCI bus 0x9f (pptr=0xffffff817e0bc000) IOMMU: Create VTD context table for PCI bus 0xa0 (pptr=0xffffff817e0bd000) IOMMU: Create VTD context table for PCI bus 0xa1 (pptr=0xffffff817e0be000) IOMMU: Create VTD context table for PCI bus 0xa2 (pptr=0xffffff817e0bf000) IOMMU: Create VTD context table for PCI bus 0xa3 (pptr=0xffffff817e0c0000) IOMMU: Create VTD context table for PCI bus 0xa4 (pptr=0xffffff817e0c1000) IOMMU: Create VTD context table for PCI bus 0xa5 (pptr=0xffffff817e0c2000) IOMMU: Create VTD context table for PCI bus 0xa6 (pptr=0xffffff817e0c3000) IOMMU: Create VTD context table for PCI bus 0xa7 (pptr=0xffffff817e0c4000) IOMMU: Create VTD context table for PCI bus 0xa8 (pptr=0xffffff817e0c5000) IOMMU: Create VTD context table for PCI bus 0xa9 (pptr=0xffffff817e0c6000) IOMMU: Create VTD context table for PCI bus 0xaa (pptr=0xffffff817e0c7000) IOMMU: Create VTD context table for PCI bus 0xab (pptr=0xffffff817e0c8000) IOMMU: Create VTD context table for PCI bus 0xac (pptr=0xffffff817e0c9000) IOMMU: Create VTD context table for PCI bus 0xad (pptr=0xffffff817e0ca000) IOMMU: Create VTD context table for PCI bus 0xae (pptr=0xffffff817e0cb000) IOMMU: Create VTD context table for PCI bus 0xaf (pptr=0xffffff817e0cc000) IOMMU: Create VTD context table for PCI bus 0xb0 (pptr=0xffffff817e0cd000) IOMMU: Create VTD context table for PCI bus 0xb1 (pptr=0xffffff817e0ce000) IOMMU: Create VTD context table for PCI bus 0xb2 (pptr=0xffffff817e0cf000) IOMMU: Create VTD context table for PCI bus 0xb3 (pptr=0xffffff817e0d0000) IOMMU: Create VTD context table for PCI bus 0xb4 (pptr=0xffffff817e0d1000) IOMMU: Create VTD context table for PCI bus 0xb5 (pptr=0xffffff817e0d2000) IOMMU: Create VTD context table for PCI bus 0xb6 (pptr=0xffffff817e0d3000) IOMMU: Create VTD context table for PCI bus 0xb7 (pptr=0xffffff817e0d4000) IOMMU: Create VTD context table for PCI bus 0xb8 (pptr=0xffffff817e0d5000) IOMMU: Create VTD context table for PCI bus 0xb9 (pptr=0xffffff817e0d6000) IOMMU: Create VTD context table for PCI bus 0xba (pptr=0xffffff817e0d7000) IOMMU: Create VTD context table for PCI bus 0xbb (pptr=0xffffff817e0d8000) IOMMU: Create VTD context table for PCI bus 0xbc (pptr=0xffffff817e0d9000) IOMMU: Create VTD context table for PCI bus 0xbd (pptr=0xffffff817e0da000) IOMMU: Create VTD context table for PCI bus 0xbe (pptr=0xffffff817e0db000) IOMMU: Create VTD context table for PCI bus 0xbf (pptr=0xffffff817e0dc000) IOMMU: Create VTD context table for PCI bus 0xc0 (pptr=0xffffff817e0dd000) IOMMU: Create VTD context table for PCI bus 0xc1 (pptr=0xffffff817e0de000) IOMMU: Create VTD context table for PCI bus 0xc2 (pptr=0xffffff817e0df000) IOMMU: Create VTD context table for PCI bus 0xc3 (pptr=0xffffff817e0e0000) IOMMU: Create VTD context table for PCI bus 0xc4 (pptr=0xffffff817e0e1000) IOMMU: Create VTD context table for PCI bus 0xc5 (pptr=0xffffff817e0e2000) IOMMU: Create VTD context table for PCI bus 0xc6 (pptr=0xffffff817e0e3000) IOMMU: Create VTD context table for PCI bus 0xc7 (pptr=0xffffff817e0e4000) IOMMU: Create VTD context table for PCI bus 0xc8 (pptr=0xffffff817e0e5000) IOMMU: Create VTD context table for PCI bus 0xc9 (pptr=0xffffff817e0e6000) IOMMU: Create VTD context table for PCI bus 0xca (pptr=0xffffff817e0e7000) IOMMU: Create VTD context table for PCI bus 0xcb (pptr=0xffffff817e0e8000) IOMMU: Create VTD context table for PCI bus 0xcc (pptr=0xffffff817e0e9000) IOMMU: Create VTD context table for PCI bus 0xcd (pptr=0xffffff817e0ea000) IOMMU: Create VTD context table for PCI bus 0xce (pptr=0xffffff817e0eb000) IOMMU: Create VTD context table for PCI bus 0xcf (pptr=0xffffff817e0ec000) IOMMU: Create VTD context table for PCI bus 0xd0 (pptr=0xffffff817e0ed000) IOMMU: Create VTD context table for PCI bus 0xd1 (pptr=0xffffff817e0ee000) IOMMU: Create VTD context table for PCI bus 0xd2 (pptr=0xffffff817e0ef000) IOMMU: Create VTD context table for PCI bus 0xd3 (pptr=0xffffff817e0f0000) IOMMU: Create VTD context table for PCI bus 0xd4 (pptr=0xffffff817e0f1000) IOMMU: Create VTD context table for PCI bus 0xd5 (pptr=0xffffff817e0f2000) IOMMU: Create VTD context table for PCI bus 0xd6 (pptr=0xffffff817e0f3000) IOMMU: Create VTD context table for PCI bus 0xd7 (pptr=0xffffff817e0f4000) IOMMU: Create VTD context table for PCI bus 0xd8 (pptr=0xffffff817e0f5000) IOMMU: Create VTD context table for PCI bus 0xd9 (pptr=0xffffff817e0f6000) IOMMU: Create VTD context table for PCI bus 0xda (pptr=0xffffff817e0f7000) IOMMU: Create VTD context table for PCI bus 0xdb (pptr=0xffffff817e0f8000) IOMMU: Create VTD context table for PCI bus 0xdc (pptr=0xffffff817e0f9000) IOMMU: Create VTD context table for PCI bus 0xdd (pptr=0xffffff817e0fa000) IOMMU: Create VTD context table for PCI bus 0xde (pptr=0xffffff817e0fb000) IOMMU: Create VTD context table for PCI bus 0xdf (pptr=0xffffff817e0fc000) IOMMU: Create VTD context table for PCI bus 0xe0 (pptr=0xffffff817e0fd000) IOMMU: Create VTD context table for PCI bus 0xe1 (pptr=0xffffff817e0fe000) IOMMU: Create VTD context table for PCI bus 0xe2 (pptr=0xffffff817e0ff000) IOMMU: Create VTD context table for PCI bus 0xe3 (pptr=0xffffff817e100000) IOMMU: Create VTD context table for PCI bus 0xe4 (pptr=0xffffff817e101000) IOMMU: Create VTD context table for PCI bus 0xe5 (pptr=0xffffff817e102000) IOMMU: Create VTD context table for PCI bus 0xe6 (pptr=0xffffff817e103000) IOMMU: Create VTD context table for PCI bus 0xe7 (pptr=0xffffff817e104000) IOMMU: Create VTD context table for PCI bus 0xe8 (pptr=0xffffff817e105000) IOMMU: Create VTD context table for PCI bus 0xe9 (pptr=0xffffff817e106000) IOMMU: Create VTD context table for PCI bus 0xea (pptr=0xffffff817e107000) IOMMU: Create VTD context table for PCI bus 0xeb (pptr=0xffffff817e108000) IOMMU: Create VTD context table for PCI bus 0xec (pptr=0xffffff817e109000) IOMMU: Create VTD context table for PCI bus 0xed (pptr=0xffffff817e10a000) IOMMU: Create VTD context table for PCI bus 0xee (pptr=0xffffff817e10b000) IOMMU: Create VTD context table for PCI bus 0xef (pptr=0xffffff817e10c000) IOMMU: Create VTD context table for PCI bus 0xf0 (pptr=0xffffff817e10d000) IOMMU: Create VTD context table for PCI bus 0xf1 (pptr=0xffffff817e10e000) IOMMU: Create VTD context table for PCI bus 0xf2 (pptr=0xffffff817e10f000) IOMMU: Create VTD context table for PCI bus 0xf3 (pptr=0xffffff817e110000) IOMMU: Create VTD context table for PCI bus 0xf4 (pptr=0xffffff817e111000) IOMMU: Create VTD context table for PCI bus 0xf5 (pptr=0xffffff817e112000) IOMMU: Create VTD context table for PCI bus 0xf6 (pptr=0xffffff817e113000) IOMMU: Create VTD context table for PCI bus 0xf7 (pptr=0xffffff817e114000) IOMMU: Create VTD context table for PCI bus 0xf8 (pptr=0xffffff817e115000) IOMMU: Create VTD context table for PCI bus 0xf9 (pptr=0xffffff817e116000) IOMMU: Create VTD context table for PCI bus 0xfa (pptr=0xffffff817e117000) IOMMU: Create VTD context table for PCI bus 0xfb (pptr=0xffffff817e118000) IOMMU: Create VTD context table for PCI bus 0xfc (pptr=0xffffff817e119000) IOMMU: Create VTD context table for PCI bus 0xfd (pptr=0xffffff817e11a000) IOMMU: Create VTD context table for PCI bus 0xfe (pptr=0xffffff817e11b000) IOMMU: Create VTD context table for PCI bus 0xff (pptr=0xffffff817e11c000) IOMMU 0x0: enabling... enabled Booting all finished, dropped to user space <<seL4(CPU 0) [decodeUntypedInvocation/212 T0xffffff817e11d400 "rootserver" @4014bf]: Untyped Retype: Insufficient memory (1 * 33554432 bytes needed, 0 bytes available).>> <<seL4(CPU 0) [decodeUntypedInvocation/212 T0xffffff817e11d400 "rootserver" @4014bf]: Untyped Retype: Insufficient memory (1 * 33554432 bytes needed, 0 bytes available).>> <<seL4(CPU 0) [decodeUntypedInvocation/212 T0xffffff817e11d400 "rootserver" @4014bf]: Untyped Retype: Insufficient memory (1 * 33554432 bytes needed, 0 bytes available).>> <<seL4(CPU 0) [decodeUntypedInvocation/212 T0xffffff817e11d400 "rootserver" @4014bf]: Untyped Retype: Insufficient memory (1 * 33554432 bytes needed, 0 bytes available).>> <<seL4(CPU 0) [decodeUntypedInvocation/212 T0xffffff817e11d400 "rootserver" @4014bf]: Untyped Retype: Insufficient memory (1 * 33554432 bytes needed, 0 bytes available).>> Single bus detected lib_pci_scan_dev found pci device 0 0 PCI :: 00.00.00 : intel Unknown device ID. (vid 0x8086 did 0x29c0) line0 pin0 lib_pci_scan_dev found pci device 0 1 PCI :: 00.01.00 : Unknown vendor ID. Unknown device ID. (vid 0x1234 did 0x1111) line0 pin0 BAR0 : [ mem 0xfd000000 sz 0x1000000 szmask 0xff000000 prefetch ] BAR2 : [ mem 0xfebb0000 sz 0x1000 szmask 0xfffff000 ] lib_pci_scan_dev found pci device 0 2 PCI :: 00.02.00 : intel Unknown device ID. (vid 0x8086 did 0x100e) line11 pin1 BAR0 : [ mem 0xfeb80000 sz 0x20000 szmask 0xfffe0000 ] BAR1 : [ io 0xc000 sz 0x40 szmask 0xffffffc0 ] lib_pci_scan_dev found pci device 0 31 PCI :: 00.1f.00 : intel intel_ich9_8 (vid 0x8086 did 0x2918) line0 pin0 lib_pci_scan_dev found multi function device 0 31 PCI :: 00.1f.02 : intel Unknown device ID. (vid 0x8086 did 0x2922) line10 pin1 BAR4 : [ io 0xc080 sz 0x20 szmask 0xffffffe0 ] BAR5 : [ mem 0xfebb1000 sz 0x1000 szmask 0xfffff000 ] PCI :: 00.1f.03 : intel intel_ich9_6 (vid 0x8086 did 0x2930) line10 pin1 BAR4 : [ io 0x700 sz 0x40 szmask 0xffffffc0 ] Guest page dir allocated at 0x10000000. Creating 1-1 entries sel4utils_reserve_range_at_no_alloc@vspace.c:601 Range not available at 0x7e00, size 0x78200 vm_reserve_memory_at@guest_memory.c:328 Failed to allocate vm reservation: Unable to create vspace reservation at address 0x7e00 of size 492032 vm_ram_register_at@guest_ram.c:355 Unable to reserve ram region at addr 0x7e00 of size 0x78200 guest_elf_relocate@guest_image.c:129 50000 relocs done. guest_elf_relocate@guest_image.c:129 100000 relocs done. Constructing guest cmdline at 0x500 of size 142 Guest boot info allocated at 0x58f. Populating... Final e820 map is: 0x0 - 0x500 type 2 0x500 - 0x7c00 type 1 0x7c00 - 0x80000 type 2 0x80000 - 0x9fc00 type 1 0x9fc00 - 0x10001000 type 2 0x10001000 - 0x90001000 type 1 Initializing guest to start running at 0x10400000 [ 0.000000] Linux version 4.8.16 (alisonf@carbon) (gcc version 7.4.0 (Ubuntu 7.4.0-1ubuntu1~18.04.1) ) #1 Wed Oct 23 17:26:59 AEDT 2019 [ 0.000000] Disabled fast string operations [ 0.000000] x86/fpu: Legacy x87 FPU detected. [ 0.000000] x86/fpu: Using 'eager' FPU context switches. [ 0.000000] e820: BIOS-provided physical RAM map: [ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x00000000000004ff] reserved [ 0.000000] BIOS-e820: [mem 0x0000000000000500-0x0000000000007bff] usable [ 0.000000] BIOS-e820: [mem 0x0000000000007c00-0x000000000007ffff] reserved [ 0.000000] BIOS-e820: [mem 0x0000000000080000-0x000000000009fbff] usable [ 0.000000] BIOS-e820: [mem 0x000000000009fc00-0x0000000010000fff] reserved [ 0.000000] BIOS-e820: [mem 0x0000000010001000-0x0000000090000fff] usable [ 0.000000] bootconsole [earlyser0] enabled [ 0.000000] Notice: NX (Execute Disable) protection missing in CPU! [ 0.000000] DMI not present or invalid. [ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved [ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable [ 0.000000] e820: last_pfn = 0x90001 max_arch_pfn = 0x100000 [ 0.000000] MTRR: Disabled [ 0.000000] x86/PAT: MTRRs disabled, skipping PAT initialization too. [ 0.000000] x86/PAT: Configuration [0-7]: WB WT UC- UC WB WT UC- UC [ 0.000000] Warning only 895MB will be used. [ 0.000000] Use a HIGHMEM enabled kernel. [ 0.000000] Scanning 1 areas for low memory corruption [ 0.000000] initial memory mapped: [mem 0x00000000-0x10ffffff] [ 0.000000] Base memory trampoline at [c009b000] 9b000 size 16384 [ 0.000000] BRK [0x10b8f000, 0x10b8ffff] PGTABLE [ 0.000000] BRK [0x10b90000, 0x10b90fff] PGTABLE [ 0.000000] RAMDISK: [mem 0x10c71000-0x11279fff] [ 0.000000] 895MB LOWMEM available. [ 0.000000] mapped low ram: 0 - 37fe2000 [ 0.000000] low ram: 0 - 37fe2000 [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000000001000-0x0000000000ffffff] [ 0.000000] Normal [mem 0x0000000001000000-0x0000000037fe1fff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000001000-0x0000000000006fff] [ 0.000000] node 0: [mem 0x0000000000080000-0x000000000009efff] [ 0.000000] node 0: [mem 0x0000000010001000-0x0000000090000fff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x0000000090000fff] [ 0.000000] On node 0 totalpages: 163846 [ 0.000000] free_area_init_node: node 0, pgdat d0a7ce40, node_mem_map f7466020 [ 0.000000] DMA zone: 32 pages used for memmap [ 0.000000] DMA zone: 0 pages reserved [ 0.000000] DMA zone: 37 pages, LIFO batch:0 [ 0.000000] Normal zone: 1760 pages used for memmap [ 0.000000] Normal zone: 163809 pages, LIFO batch:31 [ 0.000000] e820: [mem 0x90001000-0xffffffff] available for PCI devices [ 0.000000] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 [ 0.000000] pcpu-alloc: [0] 0 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 162054 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200 console=ttyS0,115200 i8042.nokbd=y i8042.nomux=y i8042.noaux=y io_delay=udelay noisapnp pci=nomsi debug root=/dev/mem [ 0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes) [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) [ 0.000000] Initializing CPU#0 [ 0.000000] Memory: 632784K/655384K available (4590K kernel code, 339K rwdata, 1744K rodata, 284K init, 496K bss, 22600K reserved, 0K cma-reserved) [ 0.000000] virtual kernel memory layout: [ 0.000000] fixmap : 0xfffe4000 - 0xfffff000 ( 108 kB) [ 0.000000] vmalloc : 0xf87e2000 - 0xfffe2000 ( 120 MB) [ 0.000000] lowmem : 0xc0000000 - 0xf7fe2000 ( 895 MB) [ 0.000000] .init : 0xd0a88000 - 0xd0acf000 ( 284 kB) [ 0.000000] .data : 0xd087bcae - 0xd0a86d40 (2092 kB) [ 0.000000] .text : 0xd0400000 - 0xd087bcae (4591 kB) [ 0.000000] Checking if this processor honours the WP bit even in supervisor mode...Ok. [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] CPU 0 irqstacks, hard=f7008000 soft=f700a000 [ 0.000000] Console: colour dummy device 80x25 [ 0.000000] console [ttyS0] enabled [ 0.000000] console [ttyS0] enabled [ 0.000000] bootconsole [earlyser0] disabled [ 0.000000] bootconsole [earlyser0] disabled [ 0.000000] tsc: Fast TSC calibration failed [ 0.000000] tsc: Unable to calibrate against PIT [ 0.000000] tsc: No reference (HPET/PMTIMER) available [ 0.000000] tsc: Marking TSC unstable due to could not calculate TSC khz [ 0.040000] Calibrating delay loop... 7023.82 BogoMIPS (lpj=35119104) [ 0.070000] pid_max: default: 32768 minimum: 301 [ 0.080000] Security Framework initialized [ 0.080000] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.090000] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes) [ 0.100000] Disabled fast string operations [ 0.100000] Last level iTLB entries: 4KB 0, 2MB 0, 4MB 0 [ 0.110000] Last level dTLB entries: 4KB 0, 2MB 0, 4MB 0, 1GB 0 [ 0.110000] CPU: Intel Core i7 9xx (Nehalem Class Core i7) (family: 0x6, model: 0x1a, stepping: 0x3) [ 0.150000] Performance Events: unsupported p6 CPU model 26 no PMU driver, software events only. [ 0.160000] devtmpfs: initialized [ 0.160000] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns [ 0.170000] kworker/u2:0 (11) used greatest stack depth: 7308 bytes left [ 0.180000] NET: Registered protocol family 16 [ 0.190000] cpuidle: using governor ladder [ 0.190000] cpuidle: using governor menu [ 0.200000] clocksource: pit: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1601818034827 ns [ 0.210000] PCI: Using configuration type 1 for base access [ 0.220000] vgaarb: loaded [ 0.220000] SCSI subsystem initialized [ 0.230000] libata version 3.00 loaded. [ 0.230000] usbcore: registered new interface driver usbfs [ 0.240000] usbcore: registered new interface driver hub [ 0.240000] usbcore: registered new device driver usb [ 0.250000] pps_core: LinuxPPS API ver. 1 registered [ 0.250000] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti(a)linux.it> [ 0.260000] PTP clock support registered [ 0.270000] dmi: Firmware registration failed. [ 0.270000] PCI: Probing PCI hardware [ 0.280000] PCI: root bus 00: using default resources [ 0.280000] PCI: Probing PCI hardware (bus 00) [ 0.290000] PCI host bridge to bus 0000:00 [ 0.290000] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] [ 0.300000] pci_bus 0000:00: root bus resource [mem 0x00000000-0xffffffff] [ 0.310000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] [ 0.320000] pci 0000:00:00.0: [5e14:0042] type 00 class 0x060000 [ 0.330000] pci 0000:00:01.0: [1234:1111] type 00 class 0x030000 [ 0.340000] pci 0000:00:01.0: reg 0x10: [mem 0x90001000-0x90001fff pref] [ 0.350000] pci 0000:00:01.0: reg 0x14: [mem 0x91001000-0x91001fff] [ 0.370000] pci 0000:00:01.0: reg 0x30: [mem 0xfeba0000-0xfebaffff pref] [ 0.380000] vgaarb: setting as boot device: PCI:0000:00:01.0 [ 0.380000] vgaarb: device added: PCI:0000:00:01.0,decodes=io+mem,owns=io+mem,locks=none [ 0.400000] pci 0000:00:02.0: [8086:100e] type 00 class 0x020000 [ 0.400000] pci 0000:00:02.0: reg 0x10: [mem 0x91002000-0x91003fff] [ 0.410000] pci 0000:00:02.0: reg 0x14: [io 0xc000-0xc03f] [ 0.420000] pci 0000:00:02.0: reg 0x30: [mem 0xfeb00000-0xfeb7ffff pref] [ 0.430000] pci 0000:00:03.0: [8086:2918] type 00 class 0x060100 [ 0.440000] pci 0000:00:03.0: quirk: [io 0x0600-0x067f] claimed by ICH6 ACPI/GPIO/TCO [ 0.450000] pci 0000:00:04.0: [8086:2922] type 00 class 0x010601 [ 0.460000] pci 0000:00:04.0: reg 0x10: [io 0xc080-0xc09f] [ 0.470000] pci 0000:00:04.0: reg 0x14: [mem 0x91022000-0x91022fff] [ 0.490000] pci 0000:00:05.0: [8086:2930] type 00 class 0x0c0500 [ 0.490000] pci 0000:00:05.0: reg 0x10: [io 0x0700-0x073f] [ 0.510000] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 00 [ 0.520000] PCI: pci_cache_line_size set to 32 bytes [ 0.520000] e820: reserve RAM buffer [mem 0x00007c00-0x0000ffff] [ 0.530000] e820: reserve RAM buffer [mem 0x0009fc00-0x0009ffff] [ 0.540000] e820: reserve RAM buffer [mem 0x90001000-0x93ffffff] [ 0.540000] NetLabel: Initializing [ 0.550000] NetLabel: domain hash size = 128 [ 0.550000] NetLabel: protocols = UNLABELED CIPSOv4 [ 0.560000] NetLabel: unlabeled traffic allowed by default [ 0.570000] clocksource: Switched to clocksource pit [ 0.570000] VFS: Disk quotas dquot_6.6.0 [ 0.580583] VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes) [ 0.580583] hugetlbfs: disabling because there are no supported hugepage sizes [ 0.608902] pci_bus 0000:00: resource 4 [io 0x0000-0xffff] [ 0.622439] pci_bus 0000:00: resource 5 [mem 0x00000000-0xffffffff] [ 0.629178] NET: Registered protocol family 2 [ 0.629178] TCP established hash table entries: 8192 (order: 3, 32768 bytes) [ 0.643721] TCP bind hash table entries: 8192 (order: 3, 32768 bytes) [ 0.651068] TCP: Hash tables configured (established 8192 bind 8192) [ 0.651068] UDP hash table entries: 512 (order: 1, 8192 bytes) [ 0.664304] UDP-Lite hash table entries: 512 (order: 1, 8192 bytes) [ 0.673571] NET: Registered protocol family 1 [ 0.679034] RPC: Registered named UNIX socket transport module. [ 0.679034] RPC: Registered udp transport module. [ 0.691033] RPC: Registered tcp transport module. [ 0.691033] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.702947] pci 0000:00:01.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff] [ 0.713872] PCI: CLS 0 bytes, default 32 [ 0.719115] Unpacking initramfs... [ 0.728865] Freeing initrd memory: 6180K (d0c71000 - d127a000) [ 0.740017] platform rtc_cmos: registered platform RTC device (no PNP device found) [ 0.749380] Scanning for low memory corruption every 60 seconds [ 0.749380] futex hash table entries: 256 (order: -1, 3072 bytes) [ 0.765067] workingset: timestamp_bits=30 max_order=18 bucket_order=0 [ 0.788927] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.798908] NFS: Registering the id_resolver key type [ 0.798908] Key type id_resolver registered [ 0.812867] Key type id_legacy registered [ 0.818762] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250) [ 0.831896] io scheduler noop registered [ 0.831896] io scheduler deadline registered [ 0.841111] io scheduler cfq registered (default) [ 0.841111] intel_idle: does not run on family 6 model 26 [ 0.854361] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 0.877337] serial8250: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A [ 0.888811] Non-volatile memory driver v1.3 [ 0.888811] [drm] Initialized drm 1.1.0 20060810 [ 0.900611] loop: module loaded [ 0.910483] lpc_ich 0000:00:03.0: I/O space for GPIO uninitialized [ 0.919536] ahci 0000:00:04.0: version 3.0 [ 0.919536] ahci: probe of 0000:00:04.0 failed with error -22 [ 0.931932] pcnet32: pcnet32.c:v1.35 21.Apr.2008 tsbogend(a)alpha.franken.de [ 0.940722] e100: Intel(R) PRO/100 Network Driver, 3.5.24-k2-NAPI [ 0.940722] e100: Copyright(c) 1999-2006 Intel Corporation [ 0.953860] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI [ 0.962047] e1000: Copyright (c) 1999-2006 Intel Corporation. [ 1.029745] BUG: unable to handle kernel paging request at f87f9820 [ 1.029745] IP: [<d06ecf45>] e1000_reset_hw+0x10f/0x180 [ 1.029745] *pde = 37021067 *pte = 00000000 [ 1.029745] Oops: 0000 [#1] [ 1.029745] Modules linked in: [ 1.029745] CPU: 0 PID: 1 Comm: swapper Not tainted 4.8.16 #1 [ 1.029745] task: f704c000 task.stack: f7050000 [ 1.029745] EIP: 0060:[<d06ecf45>] EFLAGS: 00210202 CPU: 0 [ 1.029745] EIP is at e1000_reset_hw+0x10f/0x180 [ 1.029745] EAX: f87f4000 EBX: f73f274c ECX: 00000000 EDX: 00000060 [ 1.029745] ESI: 04140240 EDI: 0000c000 EBP: f7051e38 ESP: f7051e2c [ 1.029745] DS: 007b ES: 007b FS: 0000 GS: 0000 SS: 0068 [ 1.029745] CR0: 80050033 CR2: f87f9820 CR3: 10ad2000 CR4: 00000680 [ 1.029745] Stack: [ 1.029745] f73f2000 00000000 00000000 f7051e78 d06e97c0 f7051e54 f73f2400 00000043 [ 1.029745] f73f274c 00000000 f7083800 00000000 f7051e78 d05bb85a f7051e6c d0a696d4 [ 1.029745] f7083800 f7083868 d0a69694 f7051e90 d05bbb48 d0a69660 f7083868 d0a69694 [ 1.029745] Call Trace: [ 1.029745] [<d06e97c0>] e1000_probe+0x556/0xb18 [ 1.029745] [<d05bb85a>] ? pci_match_device+0x5f/0x7c [ 1.029745] [<d05bbb48>] pci_device_probe+0x51/0x98 [ 1.029745] [<d06a48ed>] driver_probe_device+0xc9/0x1aa [ 1.029745] [<d06a4a26>] __driver_attach+0x58/0x74 [ 1.029745] [<d06a352c>] bus_for_each_dev+0x4f/0x63 [ 1.029745] [<d06a44c1>] driver_attach+0x14/0x16 [ 1.029745] [<d06a49ce>] ? driver_probe_device+0x1aa/0x1aa [ 1.029745] [<d06a4216>] bus_add_driver+0xab/0x18a [ 1.029745] [<d06a4e77>] driver_register+0x6e/0xa0 [ 1.029745] [<d05bb5a0>] __pci_register_driver+0x27/0x2a [ 1.029745] [<d0aa34b0>] ? e100_init_module+0x4d/0x4d [ 1.029745] [<d0aa34e8>] e1000_init_module+0x38/0x6e [ 1.029745] [<d0aa34b0>] ? e100_init_module+0x4d/0x4d [ 1.029745] [<d0400465>] do_one_initcall+0x7c/0xed [ 1.029745] [<d043744a>] ? parse_args+0x1b3/0x27d [ 1.029745] [<d0a88b40>] ? kernel_init_freeable+0xdf/0x17d [ 1.029745] [<d0a88b5d>] kernel_init_freeable+0xfc/0x17d [ 1.029745] [<d0878103>] kernel_init+0x8/0xcb [ 1.029745] [<d087a4e2>] ret_from_kernel_thread+0xe/0x24 [ 1.029745] [<d08780fb>] ? rest_init+0x59/0x59 [ 1.029745] Code: 8b 03 8b 40 18 80 cc 20 8b 13 89 42 18 8b 03 8b 40 08 b8 02 00 00 00 eb 05 b8 05 00 00 00 e8 22 d8 d5 ff 83 7b 0c 04 76 13 8b 03 <8b> 80 20 58 00 00 80 e4 df 8b 13 89 82 20 58 00 003 [ 1.029745] EIP: [<d06ecf45>] e1000_reset_hw+0x10f/0x180 SS:ESP 0068:f7051e2c [ 1.029745] CR2: 00000000f87f9820 [ 1.029745] ---[ end trace f9705abe48180ae4 ]--- [ 1.042868] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000009 [ 1.042868] [ 1.042868] Kernel Offset: disabled [ 1.042868] ---[ end Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000009 [ 1.042868] [ 2.558940] random: fast init done [ 133.760986] random: crng init done ------------------------------------------------------------

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PicoServer attributes
by christinefragoso＠protonmail.com 16 Nov '21

16 Nov '21

I am running on an i.MX6 the picoserver app https://github.com/seL4/camkes/tree/master/apps/picoserver Both the echo and listener components print out to serial: listener instance starting up, going to be listening on 10.0.0.2:4321 echo instance starting up, going to be listening on 10.0.0.2:1234 but only the echo component receives PicoTCP events: Assigned ipv4 10.0.0.2 to device eth0 IPv6: DAD verified valid address. echo: Connection established with 10.0.0.1 on socket 1 echo: Received a message on socket 3, going to echo to Listener echo: Received a message on socket 3, going to echo to Listener echo: Received a message on socket 3, going to echo to Listener Note that the listener component does not even print out "Connection established". I tried to figure out why, and found out that by editing this part of picoserver.camkes: /* * The attributes of the *_(control/send/recv) interfaces should be the same and unique between * different components, this determines the client ID of this component with respect to * the PicoServer component */ echo.echo_control_attributes = "1"; echo.echo_recv_attributes = "1"; echo.echo_recv_shmem_size = 0x1000; echo.echo_send_attributes = "1"; echo.echo_send_shmem_size = 0x1000; echo.ip_addr = PICOSERVER_IP_ADDR; /* * Listener config */ listener.listener_control_attributes = "2"; listener.listener_recv_attributes = "2"; listener.listener_recv_shmem_size = 0x1000; listener.listener_send_attributes = "2"; listener.listener_send_shmem_size = 0x1000; listener.ip_addr = PICOSERVER_IP_ADDR; and changing the attributes to this: /* * The attributes of the *_(control/send/recv) interfaces should be the same and unique between * different components, this determines the client ID of this component with respect to * the PicoServer component */ echo.echo_control_attributes = "0"; echo.echo_recv_attributes = "0"; echo.echo_recv_shmem_size = 0x1000; echo.echo_send_attributes = "0"; echo.echo_send_shmem_size = 0x1000; echo.ip_addr = PICOSERVER_IP_ADDR; /* * Listener config */ listener.listener_control_attributes = "1"; listener.listener_recv_attributes = "1"; listener.listener_recv_shmem_size = 0x1000; listener.listener_send_attributes = "1"; listener.listener_send_shmem_size = 0x1000; listener.ip_addr = PICOSERVER_IP_ADDR; then listener will print that it has connected to echo, but now echo will not print out anything. How do I make both echo and listener print out on the serial port? Which part of the code looks at echo.echo_recv_attributes = "1"; and listener.listener_recv_attributes = "2"; in order to determine the client ID of the echo and listener components with respect the PicoServer component? From what I can tell, attributes was not declared as an actual attribute.

1 0